1. Field
Exemplary embodiments of the present invention relate to a semiconductor integrated circuit designing technology, and more particularly, to a semiconductor integrated circuit having an array e-fuse (ARE), and a method for driving the semiconductor integrated circuit.
2. Description of the Related Art
A semiconductor integrated circuit includes circuits of the same pattern and also includes a redundancy circuit so that although some circuits have failure according to a process variable, the semiconductor integrated circuit may be used as a normal product.
In particular, a semiconductor memory device typically includes a large number of memory cells integrated into one chip, and if there is a failure in any one of the memory cells, the memory chip is regarded as a defective product and abandoned. As the integration degree of semiconductor integrated circuits increases, more memory cells are integrated into a chip of a limited size. In this state, if a failure occurs in any one memory cell and if the whole memory chip is decided as a defective product, the production yield suffers. To address this issue, semiconductor memory devices are generally equipped with a fuse circuit and a redundancy cell array.
Meanwhile, the fuse circuit is also used when a particular value decided from the testing of a semiconductor integrated circuit is to be set.
A typical fuse circuit uses a line-type metal laser fuse, and a fuse is programmed by selectively disconnecting the metal line with a laser beam. In other words, a semiconductor integrated circuit is provided with desired information according to whether the fuse is blown or not.
Production of the laser fuse circuits, however, takes continuous investment in equipment due to decreasing inter-line pitch as the integration degree of semiconductor integrated circuits increases and takes much time for fuse programming. Further, the area occupied by a fuse array is significant, and the programming is performed in the wafer stage, not at the packaging stage.
Thus, the laser fuses are often replaced by e-fuses to address the above-described features of the laser fuses. An e-fuse basically has a form of a transistor and is programmed by applying a high electric field to a gate and rupture a gate insulation layer.
While an e-fuse circuit may be realized in diverse forms, an array e-fuse (ARE) circuit having unit fuse cells formed in an array is widely used. Generally, when a semiconductor integrated circuit performs an initialization operation, which is a power-up operation, a data programmed in an ARE circuit is read and subsequently stored in a register, and the stored data is used. An operation that the programmed ARE data is stored in the register is referred to as a boot-up operation.
At present, a boot-up operation is initiated based on a reset signal inputted from the outside during an initialization operation. A memory device such as a Double-Data-Rate-3 Dynamic Random Access Memory (DDR3 DRAM) device supports an external reset function in terms of specification, and according to the specification for the DDR3 DRAM, no command is applied to the memory device for a desired time, e.g., approximately 500 μs, after an external reset signal RESETB is enabled to a logic low level. Thus, the memory device does not perform any other operation during the time. If the memory device performs the boot-up operation for a time specified by the external reset signal, no malfunctions occur.
However, semiconductor integrated circuits that do not support the external reset function may not secure the time for stably performing the boot-up operation on the array e-fuse.